CYCLED TEMPERATURE HUMIDITY BIAS LIFE TEST
standard by JEDEC Solid State Technology Association, 07/01/2013

ADDENDUM No. 1 to JESD12 – TERMS AND DEFINITIONS FOR GATE ARRAYS AND CELL-BASED INTEGRATED CIRCUITS
Amendment by JEDEC Solid State Technology Association, 08/01/1993

TEST METHODS TO CHARACTERIZE VOIDING IN PRE-SMT BALL GRID ARRAY PACKAGES
standard by JEDEC Solid State Technology Association, 10/01/2016

Graphics Double Data Rate (GDDR5X) SGRAM Standard
standard by JEDEC Solid State Technology Association, 11/01/2015

POD135 – 1.35 V PSEUDO OPEN DRAIN I/O
standard by JEDEC Solid State Technology Association, 03/01/2018

FOUNDRY PROCESS QUALIFICATION GUIDELINES – FRONT END TRANSISTOR LEVEL (Wafer Fabrication Manufacturing Sites)
standard by JEDEC Solid State Technology Association, 09/01/2018

SCALABLE LOW-VOLTAGE SIGNALING FOR 400 MV (SLVS-400)
standard by JEDEC Solid State Technology Association, 10/01/2001

HIGH BANDWIDTH MEMORY (HBM) DRAM
standard by JEDEC Solid State Technology Association, 10/01/2013

DDR4 NVDIMM-N Design Standard
standard by JEDEC Solid State Technology Association, 09/01/2016

ELECTROSTATIC DISCHARGE SENSITIVITY TESTING, HUMAN BODY MODEL (HBM) – COMPONENT LEVEL
standard by JEDEC Solid State Technology Association, 04/01/2010

EXTENSION OF THERMAL TEST BOARD STANDARDS FOR PACKAGES WITH DIRECT THERMAL ATTACHMENT MECHANISMS
standard by JEDEC Solid State Technology Association, 02/01/1999

STANDARD FOR THE MEASUREMENT OF CRE
standard by JEDEC Solid State Technology Association, 11/01/1967