Multi-wire Multi-level I/O Standard
standard by JEDEC Solid State Technology Association, 06/01/2016

SERIAL FLASH DISCOVERABLE PARAMETERS (SFDP)
standard by JEDEC Solid State Technology Association,

ADDENDUM No. 3 to JESD24 – THERMAL IMPEDANCE MEASUREMENTS FOR VERTICAL POWER MOSFETS (DELTA SOURCE-DRAIN VOLTAGE METHOD)
Amendment by JEDEC Solid State Technology Association, 11/01/1990

SOLDER BALL PULL
standard by JEDEC Solid State Technology Association, 07/01/2016

LIFE TEST METHODS FOR PHOTOCONDUCTIVE CELLS
standard by JEDEC Solid State Technology Association, 09/01/1969

Addendum No. 1 to JESD209A – LOW POWER DOUBLE DATA RATE (LPDDR) SDRAM, 1.2 V I/O
standard by JEDEC Solid State Technology Association, 03/01/2009

Long-Term Storage for Electronic Solid-State Wafers, Dice, and Devices
standard by JEDEC Solid State Technology Association, 11/01/2011

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 10/01/2016

USER GUIDELINES FOR IR THERMAL IMAGING DETERMINATION OF DIE TEMPERATURE
standard by JEDEC Solid State Technology Association, 09/01/1999

DEFINITION OF the SSTUA32S869 AND SSTUA32D869 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007

MEASUREMENT OF SMALL-SIGNAL TRANSISTOR SCATTERING PARAMETERS
standard by JEDEC Solid State Technology Association, 11/01/1972

CHIP CARRIER PINOUTS STANDARDIZED FOR CMOS 4000, HC AND HCT SERIES OF LOGIC CIRCUITS
standard by JEDEC Solid State Technology Association, 12/01/1984