Addendum No. 2 to JESD79-3 – 1.35 V DDR3L-800, DDR3L-1066, DDR3L-1333, and DDR3L-1600
Amendment by JEDEC Solid State Technology Association, 10/01/2011

DDR2 SPD INTERPRETATION OF TEMPERATURE RANGE AND (SELF-) REFRESH OPERATION
standard by JEDEC Solid State Technology Association, 06/01/2006

EARLY LIFE FAILURE RATE CALCULATION PROCEDURE FOR SEMICONDUCTOR COMPONENTS
standard by JEDEC Solid State Technology Association, 02/01/2007

Byte Addressable Energy Backed Interface
standard by JEDEC Solid State Technology Association, 07/01/2017

POD18 – 1.8 V Pseudo Open Drain I/O
standard by JEDEC Solid State Technology Association, 12/01/2006

TEST METHOD FOR REAL-TIME SOFT ERROR RATE
standard by JEDEC Solid State Technology Association, 10/01/2007

DEFINITION OF THE SSTUA32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY TEST FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007

Descriptive Designation System for Semiconductor-device Packages
standard by JEDEC Solid State Technology Association, 01/01/2016

SON/QFN PACKAGE PINOUTS STANDARDIZED FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
standard by JEDEC Solid State Technology Association, 07/01/2004

ACCELERATED MOISTURE RESISTANCE – UNBIASED AUTOCLAVE
standard by JEDEC Solid State Technology Association, 11/01/2010

Addendum No. 1 to JESD209-4 – Low Power Double Data Rate 4 (LPDDR4)
Amendment by JEDEC Solid State Technology Association, 01/01/2017

DISCONTINUING USE OF THE MACHINE MODEL FOR DEVICE ESD QUALIFICATION
standard by JEDEC Solid State Technology Association, 07/01/2015