TERMS, DEFINITIONS, AND LETTER SYMBOLS FOR MICROELECTRONIC DEVICES
standard by JEDEC Solid State Technology Association, 05/01/2007

DESCRIPTION OF 5 V BUS SWITCH WITH TTL-COMPATIBLE CONTROL INPUTS
standard by JEDEC Solid State Technology Association, 06/01/1999

Descriptive Designation System for Semiconductor-device Packages
standard by JEDEC Solid State Technology Association, 01/01/2016

SON/QFN PACKAGE PINOUTS STANDARDIZED FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
standard by JEDEC Solid State Technology Association, 07/01/2004

MULTIMEDIACARD (MMC) ELECTRICAL STANDARD, HIGH CAPACITY (MMCA, 4.2)
standard by JEDEC Solid State Technology Association, 07/01/2007

Universal Flash Storage (UFS) Host Controller Interface
standard by JEDEC Solid State Technology Association, 06/01/2012

GUIDELINES FOR GaAs MMIC AND FET LIFE TESTING
standard by JEDEC Solid State Technology Association, 12/01/2018

METHOD FOR CHARACTERIZING THE ELECTROMIGRATION FAILURE TIME DISTRIBUTION OF INTERCONNECTS UNDER CONSTANT-CURRENT AND TEMPERATURE STRESS
standard by JEDEC Solid State Technology Association, 03/01/2006

ADDENDUM No. 6 to JESD24 – THERMAL IMPEDANCE MEASUREMENTS FOR INSULATED GATE BIPOLAR TRANSISTORS
Amendment by JEDEC Solid State Technology Association, 10/01/2001

PROCUREMENT STANDARD FOR KNOWN GOOD DIE (KGD)
standard by JEDEC Solid State Technology Association, 09/01/2005

DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 11/01/2004

HIgh Bandwidth Memory DRAM (HBM1, HBM2)
standard by JEDEC Solid State Technology Association, 11/01/2018