JEDEC JESD 82-24
September 11, 2020
No Comments
Click here to purchase
This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32865 registered buffer with parity for 2 rank by 4 or similar high-density DDR2 RDIMM applications. The SSTUB32865 is identical in functionality to the SSTU32865 but specifies tighter timing characteristics and a higher application frequency of up to 410MHz.
Product Details
- Published:
- 05/01/2007
- Number of Pages:
- 29
- File Size:
- 1 file , 220 KB