JEDEC JESD203
September 11, 2020
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This standard defines ac test loads for dual-supply level translation devices. Uniform test loads enable easy comparison of electrical parameters of dual-supply level translation devices across functions, logic families and IC suppliers. This standard is only intended to apply to devices released subsequent to the publication of this document.
Product Details
- Published:
- 11/01/2005
- Number of Pages:
- 9
- File Size:
- 1 file , 86 KB