JEDEC JESD8-28
September 11, 2020
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This standard is to define and interface with a CMOS rail to rail signal that uses a 300 mV signal swing. This specification defines the maximum signaling rate, the signal levels, overshoot and undershoot limits, and the maximum input capacitance. This interface is useful in short distance applications, typically of less than 5 mm.
Product Details
- Published:
- 06/01/2015
- Number of Pages:
- 10
- File Size:
- 1 file , 61 KB